Monolithic differential high-pass filters are used in many mixed signal integrated analog circuits as well as read channels for disk drive circuits in order to eliminate the effect of offset which is generated by internal circuitry. The offsets are often the result of mismatches which are due to various factors such as component mismatches, temperature gradient, etc. The lower cutoff frequency (F.sub.C) of the high-pass filter is usually within the range of a few kilohertz to a few hundred kilohertz. The low frequency cutoff F.sub.C is chosen such that it should be sufficiently low in order to prevent any phase distortion on the output signal, and it should be sufficiently high in order to avoid slow transition in startup of the component. In applications where the data rate or the signal frequency shows a large amount of variation in various modes, it is desirable to have a programmable high-pass filter to be able to optimize the operation. Trimming may be necessary since the component tolerances may result in larger deviation than the programming of the high-pass filter. The programmability can only be achieved if the process variation is corrected by trimming and if the trimming accuracy is less than or equal to half of the step sizes in the programming.
FIG. 1 illustrates such a high-pass filter in monolithic form with F.sub.C as a low-frequency corner frequency. The input to the high-pass filter 100 is voltage V.sub.in and the output of the high-pass filter 100 is voltage V.sub.outps. The operational amplifier 102 and the capacitor 104 and resistor 106, resistor 108 R.sub.1, and resistor 110 R.sub.2 form an (inverting) Active-RC low-pass filter circuit from the node at the output of summing circuit 116 shown as voltage V.sub.out to the node at V.sub.L which is the output of the operational amplifier 102.
Equation 1 illustrates the Laplace transform. ##EQU1##
where R is the total value of the combination resistances of resistor 106, resistor 108 and resistor 110, and depending on input signals B.sub.1 and B.sub.2 where input signal B.sub.1 and input signal B.sub.2 are digital signals as illustrated in Equation 2. ##EQU2##
Thus, the input signals B.sub.1 and B.sub.2 control the total resistance by effectively shorting resistor 108 and resistor 102 through switches 112 and 114.
The parameter g.sub.0 in Equation 1 is the parasitic conductance across capacitor 104.
The summation circuit 116 sums voltage V.sub.in and voltage V.sub.L as illustrated in Equation 3. EQU V.sub.out (S)=V.sub.in (S)+V.sub.L (S). (3)
Substituting Equation 1 in Equation 3 yields Equation 4. ##EQU3##
Equation 4 is the first order high-pass filter Laplace domain transfer function, for which the cutoff frequency is illustrated in Equation 5. ##EQU4##
The zero frequency is derived in Equation 6. ##EQU5##
The cutoff frequency and the zero frequency are illustrated as high-pass filter magnitude characteristics as shown in FIG. 2.
The circuit 100 uses three settings of R which correspond to fast, slow and medium speeds in order to adjust the corner frequency F.sub.C. The circuit of FIG. 1 requires an input signal for each switch to control the resistance. Thus, there is no trimming due to process variations.